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7 µF • Lead spacing: 15
6" FHD IPS AG EDP1
Ambient Operating Temperature Range
MEMORY 512MB SDRAM DDR PC2100 266MHZ CL2
3-state or weak pullup on select I/O pins - Optional configurable grounds on unused I/Os - Mixed I/O voltages compatible with 1
Xilinx Field Programmable Gate Array | Part #: XC3S400-4FG320I | FPGA | DEX t1000 7 µF • Lead spacing:The Xilinx XC3S400 4FG320I Spartan 3 family of FPGA's is specifically designed to meet the needs of high volume, cost sensitive consumer electronic applications. The eight member family offers densities ranging from 50,000 to 5,000,000 system gates. Features Low cost, high performance logic solution for high volume, consumer oriented applications Densities up to 74,880 logic cells SelectIO interface signaling Up to 633 I O pins 622+ Mb s data transfer
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